Intel Xeon 6700P and 6500P Granite Rapids-SP for the Masses Initial Benchmarks and First Look – ServeTheHome
This Intel Xeon 6 series has been a launch we have been waiting on for around three quarters. Today, we have the launch of the Intel Xeon 6700P and Xeon 6500P series. These are the smaller Socket E2 (LGA4710-2) processors compared to the big socket Intel Xeon 6900P series. At the same time, they are not necessarily “lower-end” as they can scale to 4 sockets, eight sockets and beyond. What is more, we will show you perhaps one of the coolest capabilities we previewed in September 2024, called the “R1S,” which is the single-socket mode with 136 PCIe Gen5 lanes. We have a lot to get into in this one.Usually, we first go into the cores, speeds, feeds, and so forth. Realistically, this is a Granite Rapids P-core CPU that we have seen in the 6900P series with similar feature sets with a slightly smaller platform. We will start our regular discussion on page 2, but I wanted to get to perhaps the most significant new feature and platform. The big winner from this series might be the least expected. Intel has a new mode that trades UPI links for PCIe Gen5 links, similar to what AMD does with its Infinity Fabric links on EPYC. The net result is a 136 PCIe Gen5 single-socket platform that should make the storage industry and many others drool.Intel is starting to take 1S seriously with lower-priced single-socket SKUs. Like the other Intel Xeon 6700P SKUs, we get 8-channel DDR5 support, and the higher-end single-socket SKUs support MCRDIMMs/ “MRDIMMs”. Intel is also giving access to its onboard accelerators like QAT by default, which is great.Intel is repurposing UPI links for PCIe Gen5 links. In this single-socket motherboard block diagram, we can see that UPI0 and UPI1 lanes are being used instead of UPI.Here is a quick look at the Intel Xeon 6781P in the Supermicro server with the motherboard above. The two NUMA nodes are a choice, as this can also be set as a single NUMA domain. Two compute tiles make it easy to partition the chip into two NUMA nodes.Intel’s parts seem to have L3 cache defined at the tile level, rather than simply by the number of cores, meaning that the ratio can shift depending on the core count. In the 80-core part with 336MB of L3 cache, Intel has 4.2MB of L3 cache and 2MB of L2 cache per core. In the 2021-2023 top-bin Intel Xeon Platinum 8380, there was only 60MB of L3 cache in total. Intel has the same exact core count as two Platinum 8380’s, but with around 2.8x the L3 cache and 2x the L2 cache. Intel has largely closed the cache gap with AMD.When I first saw this. I was excited. We are using a 1U Supermicro server, which probably does not fully do the R1S platform justice. Here we have eight (up to 12) NVMe SSDs up front and up to three x16 devices in the rear. If you use new 122.88TB SSDs, like the Solidigm D5-P5336 122.88TB NVMe SSD you can easily fit over 1PB of storage per U while still having enough PCIe lanes for internal M.2 SSDs, and PCIe Gen5 x16 400Gbps NICs in the rear.Scaling this up to 2U, we could use 24x U.2 122.88TB drives for 3PB (1.5PB/1U), which is only 96 lanes. That still leaves 40 PCIe Gen5 lanes for other components. That is two 400GbE NICs plus eight lanes for boot drives, lower-performance NICs, and other hardware. While we only get eight memory channels, oftentimes in storage platforms costs are reduced through using fewer DIMMs. Here, at least in the higher-end CPUs, one can use MCRDIMMs/ MRDIMMs to get more memory bandwidth from fewer DIMMs.From a competitive standpoint, AMD does not have a direct competitor. The 12-channel EPYC 9000 series platforms do not have as many PCIe Gen5 lanes (128) but do have 8 lower-speed PCIe Gen3 lanes in single-socket servers. Still, this is the first time in a long time that Intel had an outright, albeit slight, win in a single-socket PCIe category. Beyond that, AMD has the EPYC 8004 series, a smaller socketed processor but with older Zen 4c cores and fewer PCIe lanes and memory channels. I really like the EPYC 8004 series, but Intel now has something firmly between it and the EPYC 9000 series.Of course, AMD can still win the outright core count battle in single-socket, but most storage servers and many single socket servers simply aim lower in the stack than 100+ core parts. AMD will claim it has more cores, but Intel has a winner with the R1S configurations. From what we understand, the 1P SKUs above are just the ones discounted explicitly for this operation mode, but the ability to toggle the UPI to PCIe is not exclusive to those SKUs.Next, let us get to the more mainstream parts of the new Xeon 6 CPUs.Another great analysisThese’ll outsell the 6900 series by many times. They’re not sexy but they’re enough for most people.I’m still believing that the issue is the price of the newer chips. We used to be able to buy mid-ranged servers for under $5k. Now you’re talking $15k-20k. It’s great if they’re offering consolidation, but nobody wants to open their wallet on legacy CPU compute if they’re paying as much as they did for the older servers that are all running fineYou’ve colored me intrigued with this R1S businessJust want to say 8-socket 6700/86core, 4TB each. It’s 688 cores and 32TB in a single x86 server pulling 2800W for CPU alone.Some day I’d like to see that system, not that my budgets ever include that kind of thing, what use case? Some accounting program, or day-trading bot that wants a thread per trade which somehow is coded only in x86. VDI for 600 users on a single server? I mean you could run 1000 web servers, but why on this instead of a bunch of 1-2U servers. Same with container apps at AWS. what’s the use case?Supermicro did this on Xeon 4th gen – 6U, 4x mainboard modular trays, vertical pcie in the back of the thing.Honestly single socket systems are my favorite thing.And a single socket system with enough PCIe bandwidth to have nearly zero restrictions on throughput between storage and networking is fantastic.MDF it’s mostly apps like SAP HANA where you need so much memory in a single node. That’s why the cloud co’s all have instances with 4P and 8P. It’s a low volume business but high in the almighty dollar@Jed JI don’t know about that. The four customers that buy more than 50% of all servers worldwide primarily ship the highest density processors they can get their hands on. The Xeon 6900 parts are bought mostly by hyperscalers, these small baby xeons are designed for the rest of the market which is becoming so small they’re practically a footnote in server design. Thats why these launched so far later than the higher volume 6900 parts did.The P-core parts with AMX are great for AI prototyping. GPUs with large GRAM are not very accessible under 10k.I’d like to see how fast non-distilled AI interference runs on these SKUs.The full models have 600 billion or more parameters, require 1TB RAM and could demonstrate the matrix hardware built-in. A comparison to the performance of large Power10 systems that also have built-in matrix units would be interesting as well as recent EPYC processors.Xeon® 6787P High Priority Cores 36C C Low Priority Cores 50C P/E core？？？？？？？？？Eric – good idea.argus – I have an e-mail out to Intel on that. I think it is part of the power saving mode which one can select in BIOS, but will confirm. If you look at the Xeon 6781P we have the topology map on, those are all P-cores even though that has high and low priority as well.Save my name, email, and website in this browser for the next time I comment.Sign me up for the STH newsletter!
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